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Senior Staff Memory Subsystem Verification Engineer

Advanced Micro Devices
Full-time
Remote friendly (Dublin, Ireland)
Worldwide
Level - Senior

Role Overview

The Senior Staff Memory Subsystem Verification Engineer will be part of the Memory Subsystem team at AMD, focusing on the design, definition, and verification of high-speed LPDDR/DDR memory subsystem solutions and relevant IP. The position involves leading verification efforts across various product lines and participating in pre-silicon and production-level firmware co-verification using advanced methodologies.

Experience Level

This role is classified under the Level - Senior category, requiring significant expertise in memory subsystem verification and engineering best practices.

Key Responsibilities

The primary responsibilities of this role include:

  • Architecting, developing, and maintaining UVM-based verification environments for memory subsystems.
  • Leading verification activities at both IP and subsystem levels, which encompasses test planning, coverage definition, and execution.
  • Developing and debugging co-verification environments that integrate firmware with hardware simulations.
  • Integrating and debugging Memory VIP, transactors, monitors, and checkers.
  • Analyzing functional and code coverage, while managing regressions.
  • Collaborating with teams across various locations and mentoring other engineers on best practices.

Qualifications

Required qualifications for this position include:

  • Strong knowledge and application skills in Object-Oriented Programming.
  • Proficiency in SystemVerilog, UVM, and C/C++.
  • Experience with IP and subsystem verification using industry-standard simulators (e.g., VCS).
  • Background in testbench architecture along with firmware/hardware co-verification.
  • Proficiency in Python, shell scripting, and version control tools such as Git or Perforce.

Preferred Experience

Preferred qualifications include experience with:

  • DDR/JEDEC standard IP, DDR PHY, or memory controllers.
  • Assertions (SVA/OVL), SystemC, and Zebu emulation.
  • End-to-end verification from front-end development through to lab bring up.
  • Technical mentorship of engineers.

Education Requirements

A Bachelor’s or Master’s degree (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field is required, along with relevant practical experience in verification engineering.