Senior Staff Manager (CAD Manager)

Job Title

Senior Staff Manager (CAD Manager)

Role Summary

Lead a CAD/EDA team of approximately 10 engineers to provide and maintain CAD tools, design flows, and infrastructure supporting semiconductor IC development from RTL to tape-out. Collaborate with design teams, EDA vendors, and IT to ensure reliable toolchains, compute resources, and process compliance.

Drive tooling, automation, standards, and process improvements to enable scalable, repeatable chip design and verification at advanced nodes.

Experience Level

Senior — 14+ years of experience in semiconductor design and CAD/EDA tool management.

Responsibilities

Primary responsibilities include managing CAD tools, infrastructure, and team delivery.

• Administer, install, upgrade, and support EDA tools (Cadence, Synopsys, Mentor, etc.) and license servers.
• Manage compute farm, storage, and job schedulers in coordination with IT.
• Develop and maintain front-end and back-end design flows (RTL, synthesis, place & route, DRC/LVS, timing closure).
• Automate tasks and flows using scripting (Python, Perl, TCL, Shell).
• Define and enforce CAD standards, naming conventions, and version-control practices.
• Conduct design database audits and support tape-out preparation and sign-off.
• Provide technical support and training to engineering teams; liaise with EDA vendors for tool evaluation and issue resolution.
• Identify flow bottlenecks, evaluate new EDA technologies, and drive continuous productivity improvements.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Must-have: 14+ years experience in semiconductor CAD/EDA environments; strong expertise with industry-standard EDA tools (Cadence Virtuoso, Synopsys ICC2, Mentor Calibre or similar).
• Must-have: Proficiency in scripting (Python, Perl, TCL, Shell) and experience with version control systems (Git, Perforce).
• Must-have: Practical knowledge of RTL-to-GDSII flows, verification, DFM, and tape-out processes; strong problem-solving and leadership skills.
• Nice-to-have: Familiarity with advanced process nodes (5nm, 3nm, 2nm) and foundry flow requirements.
• Nice-to-have: Experience with cloud-based EDA environments, compute farm management (LSF, Slurm), or ML applications in EDA.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field is specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.