Senior Staff IP Design Engineer

Role Summary

The Senior Staff IP Design Engineer will join a team tasked with designing and developing Lattice Foundation IP. This role requires leading the research, design, and development of IP deliverables, while also refining product life cycle processes.

Experience Level

12+ years of experience in FPGA IP and/or EDA tools development.

Responsibilities

The successful candidate will be responsible for:

• Leading the design and development of Foundation IP and/or FPGA primitives.
• Planning and coordinating the Lattice Foundation IP release cycle.
• Conducting requirement analysis, feature scoping, development, testing, and validation.

Requirements

Must possess:

• A degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields.
• Strong communication skills and hands-on experience in complex FPGA RTL design.
• Experience in generating audit-ready Functional Safety evidence in compliance with safety standards is preferred.

Education Requirements

Bachelors, Masters, or higher in a relevant field.