Senior Staff Engineer - Transactor Development & Design Verification
SynopsysJob Title
Senior Staff Engineer - Transactor Development & Design Verification
Role Summary
The Senior Staff Engineer will develop advanced emulation solutions for industry-standard protocols such as PCIe, CXL, and UCIe. This role involves collaborating with teams to ensure high performance and reliability of semiconductor products.
Experience Level
Senior level with 6-10 years of experience.
Responsibilities
The responsibilities include:
- Developing emulation solutions for PCIe, CXL, and UCIe protocols.
- Engaging in software development using C/C++ and synthesizable RTL development with Verilog.
- Verifying solutions for performance and reliability.
- Interacting with customers during deployment and debug phases.
- Collaborating with cross-functional teams.
- Maintaining and enhancing existing emulation solutions.
Requirements
Must-have skills include:
- 5+ years of relevant experience.
- In-depth knowledge of PCIe, CXL, and UCIe protocols.
- Proficiency in C/C++ programming.
- Strong understanding of digital design and HDL languages (Verilog, System Verilog).
- Experience with scripting languages (Python, Perl, TCL).
- Familiarity with ARM architecture and UVM/functional verification is a plus.
Education Requirements
B.E/B.Tech/M.Tech in Electronic & Communication or Computer Science Engineering is required.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
