Senior Staff Engineer - SoC Design

Role Overview

The Senior Staff Engineer in SoC Design at Synopsys is focused on designing and implementing semiconductor solutions. This role requires deep expertise in Place & Route processes, particularly with tools such as Synopsys Fusion Compiler and ICC2.

Position Summary

The candidate will work in a collaborative and technical environment with a goal to develop high-performance silicon through innovative design solutions. The ideal candidate has a solid background in Electronics, Electromechanics, or Telecommunications, and is adept at both debugging and guiding juniors.

Experience Level

This position is suited for professionals with over 7 years of experience in SoC design, specifically in the realm of Place & Route methodologies.

Key Responsibilities

• Design and implement SoC solutions utilizing Synopsys EDA tools and additional IP resources.
• Provide expert advice to customer design and CAD teams.
• Formulate and apply innovative design strategies.
• Establish project goals and manage timelines effectively.
• Work collaboratively with other Synopsys teams to deliver robust tool and IP solutions.
• Mentor junior engineers by sharing knowledge and directing project efforts.

Essential Requirements

Candidates must possess a strong technical foundation in the relevant field, with the following qualifications:

• BS/MS/PhD in Engineering disciplines (Electronics, Electromechanics, Telecommunications).
• Over 7 years of professional experience with Fusion Compiler and ICC2.
• Proficient in debugging methodologies and block management.
• Familiarity with P&R, extraction, timing analysis, IREM, and Physical Verification processes.
• Experience in debugging DRC/LVS/ANT reports is a significant plus.
• Competency in TCL/PERL scripting.
• Strong capabilities to lead projects and mentor team members.
• Fluency in English communication.

Education Requirements

A BS, MS, or PhD in relevant engineering disciplines is required.