The Senior Staff Engineer - Analog Design will be responsible for innovating and implementing cutting-edge analog IC designs, particularly focusing on high-speed connectivity solutions, including SERDES technologies. This role demands extensive experience in analog design, combining technical expertise with strategic architectural insights.
A minimum of 7 years of relevant experience in analog IC design is expected, with advanced degrees such as MTech/MS preferred. Proven capabilities in managing complex design challenges and delivering high-quality silicon solutions are essential.
Applicants should possess a strong foundation in analog IC design with specialized experience in high-speed technologies. A background in FinFET and CMOS is essential. Knowledge of SERDES components and system-level design practices is necessary, along with proficiency in related design tools and scripting languages. Excellent communication skills and a commitment to teamwork and innovation are also required.
Candidates must hold at least a BTech/BS in Electrical or Computer Engineering or a related field, with a preference for those holding an MTech/MS degree and extensive industry experience.