Senior Staff Design Engineer

Job Title

Senior Staff Design Engineer

Role Summary

Senior individual-contributor on the hardware design team responsible for physical implementation of IP blocks and full-chip integration for FPGA/ASIC products. The role leads RTL-to-GDSII flows and drives physical design methodology, signoff, and cross-team collaboration.

Position is based in Pune, India and focuses on place & route, CTS, timing closure, power planning, physical verification and EDA tool/methodology improvements.

Experience Level

Senior — typically 12+ years of relevant physical-design/ASIC implementation experience as stated in the posting.

Responsibilities

Primary responsibilities include leading physical implementation tasks and improving design flows and quality.

• Lead RTL-to-GDSII implementation for complex ASIC/IP blocks and contribute to full-chip closure.
• Implement and own place & route, CTS, routing, floorplanning, power planning, and timing closure activities.
• Perform physical signoff checks including timing closure, EM/IR, and physical verification (DRC, LVS).
• Drive improvements to physical design flows and methodologies; coordinate with internal EDA team and external tool vendors.
• Develop scripts and automation (Perl/Python or similar) to improve design efficiency and methodology.
• Collaborate with RTL, DFT, verification, and full-chip teams to ensure robust implementation.
• Mentor colleagues, share best practices, and help build team capability for FPGA fabric integration.
• Occasional travel as needed to work with global teams.

Requirements

Must-have technical skills and proven delivery experience.

• 12+ years driving physical-design activities for ASIC blocks and full-chip integration.
• Proven experience with multiple tapeouts.
• Hands-on experience with industry-standard physical-design and signoff tools (examples: Innovus, Genus, Tempus, Voltus, Calibre, Conformal).
• Strong scripting skills to automate flows and enhance methodology (Perl, Python, or equivalent).
• Independent problem-solver with demonstrated ability to deliver under schedule and quality targets.
• Experience working across multiple sites and time zones; strong communication and collaboration skills.

Education Requirements

Bachelor's, Master’s or PhD in Electronics Engineering, Electrical Engineering, Computer Science or a related technical field, or equivalent practical experience.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.