Senior Staff Circuit Design Engineer

Job Title

Senior Staff Circuit Design Engineer

Role Summary

Senior Circuit Design Engineer on the Foundation IP memory team in Ho Chi Minh City responsible for designing, implementing, and validating special embedded memory circuits (TCAM, BCAM, multi-port SRAM) for advanced process nodes. The role covers architecture definition through schematic, simulation, layout planning, verification, and silicon bring-up.

Experience Level

Senior — the posting requests 3+ years of hands-on experience designing embedded CMOS memory circuits at 28nm or more advanced nodes.

Responsibilities

Key day-to-day responsibilities include:

• Design and develop CMOS special memory circuits (TCAM, BCAM, multi-port SRAM) for advanced nodes.
• Define memory architecture and implement circuits for ultra-high-speed, ultra-low-power, or high-density targets.
• Drive schematic entry, circuit simulation, and timing verification from bitcell to full array.
• Plan and supervise layout, review parasitic extraction results, and work with layout engineers to meet performance and DRC/LVS constraints.
• Collaborate with CAD and frontend teams to integrate designs into memory compiler flows and generate timing/functional models.
• Support silicon bring-up, perform failure analysis, translate test data into design improvements, and reduce respins.
• Lead and participate in design reviews and mentor junior engineers on circuit and layout tradeoffs.

Requirements

Must-have technical skills and experience:

• 3+ years designing embedded CMOS memory circuits at 28nm or more advanced process nodes.
• Proven experience across the embedded memory design flow: architecture, circuit design, layout implementation, compiler integration, and timing model generation.
• Strong proficiency with bitcell design, circuit simulation tools (HSPICE, Spectre), and parasitic extraction analysis.
• Deep understanding of SRAM, TCAM, BCAM, and multi-port memory architectures, including failure analysis and memory test methodology.
• Experience with layout verification tools (Calibre or ICV) and debugging DRC, LVS, and ERC issues.
• Ability to debug silicon, trace failures through test vectors and SPICE decks, and deliver root-cause fixes.

Nice-to-have:

• Experience specifically with TCAM or multi-port SRAM design and optimization.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related technical field. (The source lists degree requirements explicitly.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.