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Senior Staff, ASIC Design Verification Engineer

Synopsys
Full-time
On-site
Kanata, Ontario, Canada
Level - Senior

Role Overview

This position is for a Senior Staff ASIC Design Verification Engineer based in Kanata, Ontario, Canada. The successful candidate will work on advanced ASIC design projects, leveraging their expertise to ensure high-quality verification processes.

Experience Required

We are looking for candidates with significant experience in ASIC design verification, preferably in a senior engineering capacity. A history of successfully leading verification efforts and collaborating across teams is essential.

Key Duties

The responsibilities of the Senior Staff ASIC Design Verification Engineer include:

  • Developing and executing verification plans for ASIC designs.
  • Collaborating with design and architecture teams to define requirements.
  • Utilizing advanced verification methodologies and tools.
  • Troubleshooting and resolving design issues effectively.
  • Mentoring and guiding junior engineers in best practices.

Qualifications

Successful candidates will possess the following qualifications:

  • Extensive experience in ASIC verification with a strong understanding of digital design concepts.
  • Proficiency in SystemVerilog or similar hardware description languages.
  • Experience with verification tools such as UVM.
  • Strong communication skills and history of effective collaboration.
  • Ability to work independently and manage multiple tasks simultaneously.

Education Requirements

A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field is required.