Senior SoC RTL Integration and Performance Engineer

Role Summary

Arm’s System-on-Chip (SoC) Performance Analysis Team is responsible for building early performance analysis platforms that enable technology exploration on future Arm SoC architectures. We are looking for simulation/emulation engineers to join our team and contribute to the development and performance analysis of SoCs.

Experience Level

Level - Senior

Responsibilities

• Integrate IPs and develop monitors for SoC verification testbench used in simulation and emulation-based performance analysis.
• Modify RTL and system level IPs to create various SoC flavors.
• Make incremental changes to system level firmware and bring-up SoC to execute test cases.
• Verify SoC with bare-metal tests and OS boot.
• Collaborate with architects to define future SoC architectures.
• Explore innovative approaches for SoC integration and develop supporting tools and workflows.

Requirements

• Experience in RTL design, SoC architecture, and IP integration.
• Proficient in implementing RTL modules using Verilog/System Verilog.
• Strong understanding of bus protocols.
• Experience with simulators and waveform debugging tools such as Verdi.
• Experience in Python/Ruby, C/C++, and assembly language.
• Experience in executing workloads and benchmarks on RTL Simulation and Emulation environments.
• Experience in bringing-up full-chip SoC test cases in Simulation and Emulation.
• Excellent communication and teamwork skills with a proactive problem-solving ability.

Education Requirements

A degree in Electrical Engineering, Computer Engineering, or a related field is typically expected for this role.