The Senior SoC Methodology Architect in VLSI Physical Design at NVIDIA will play a crucial role in the development of advanced AI and GPU technology. This position involves working on physical design execution, ensuring efficient floorplan methodologies, and collaborating with various teams to address design integration challenges.
The ideal candidate should possess over 4 years of relevant work experience in hardware engineering with significant exposure to chip floorplanning and physical design methodologies.
- Define and optimize top-level floorplan including die size estimation and route planning.
- Drive internal tools and methodologies related to top-level floorplan automation.
- Facilitate rapid analyses and efficient execution of new chips on advanced process technologies.
- Collaborate with architects, designers, and integration teams to proactively identify and resolve issues related to floorplans.
- Evaluate floorplans to detect potential issues and propose automated solutions.
- Provide technical support to internal teams during development and integration.
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
- Strong background in hardware engineering, specifically in chip floorplan, placement, and routing.
- Proficiency in EDA tools and methodologies for physical design.
- Familiarity with programming languages like Python, Perl, and C/C++.
- Strong problem-solving skills and the ability to analyze complex engineering problems.
BS/MS in Electrical Engineering, Computer Engineering, Computer Science or equivalent experience is mandatory.