Senior SOC Design Engineer - Networking Group
NVIDIAJob Title
Senior SOC Design Engineer - Networking Group
Role Summary
Design and integrate system-on-chip (SoC) components for next-generation networking DPUs and switch silicon. The role focuses on system-level integration, defining methodologies and IP for subsystems, and driving cross-functional execution toward silicon milestones.
Experience Level
Senior. The posting indicates experience expectations consistent with a senior engineer; see Education Requirements for the explicit years guideline.
Responsibilities
Key responsibilities include system-level design, cross-team coordination, and delivery of integrated models for verification.
- Define project milestones, assign tasks, and track progress through an agile framework.
- Develop system-level methodologies, tools, and reusable IP to build scalable subsystems.
- Collaborate with SOC assembly and cross-functional teams to meet SOC milestone execution.
- Integrate components and deliver models for verification at cluster, subsystem, SOC, and emulation levels.
Requirements
Must-have technical skills and experience (minimum set):
- Demonstrated understanding of all phases of SoC development: ASIC architecture, micro-architecture, RTL design, verification, timing closure, and physical design.
- Experience with RTL and verification languages/tools (Verilog/SystemVerilog, Cadence or equivalent simulators) and debug tools such as Indago and GDB.
- Experience working with software teams to define HW/SW interfaces, including control/status registers, interrupts, and error handling.
- Hands-on experience with successful tape-outs of complex, high-volume SoCs in advanced process nodes.
- Exposure to multiple chip design disciplines and ability to collaborate across functions; strong verbal and written communication skills.
Nice-to-have:
- Experience in synthesis, physical design, DFT, RTL build, and design automation.
- Chip-lead technical leadership on complex SoC deliveries for enterprise or HPC applications.
- Experience with RTL coding/debug, performance/power/area analysis and trade-offs.
- Experience working closely with physical design teams to optimize power, performance, and area.
- Prior experience with smartNICs or high-speed interconnects; strong scripting skills (Perl, Python, etc.).
Education Requirements
BS or MS degree (or equivalent practical experience). The posting specifies a BS (or equivalent experience) or MS plus approximately 4+ years of practical semiconductor design and architecture experience building complex SoCs; equivalent professional experience is acceptable.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
