Senior R&D Engineer

Role Summary

The Senior R&D Engineer is responsible for developing and optimizing software for Zebu Server simulation. This role involves collaboration with global teams to enhance emulation systems, ensuring advanced performance and innovative solutions for FPGA chip design.

Experience Level

Mid-level; 1–3 years of experience in C++ development on Linux.

Responsibilities

The key responsibilities include:

• Developing and optimizing software for Zebu Server emulation.
• Collaborating with global teams on compiler, timing, and performance aspects.
• Brainstorming and implementing innovative solutions for FPGA emulation challenges.
• Benchmarking new features and validating improvements.
• Documenting and communicating technical progress.

Requirements

Must-have:

• MS/Ph.D. in Computer Science, Computer Engineering, or Electrical Engineering.
• 1–3 years of C++ development in Linux.
• Strong skills in algorithms and data structures.
• Knowledge of digital logic, FPGA, and Verilog/System Verilog.
• Preferred experience in EDA flow; ML experience is a plus.

Education Requirements

A Master's or Ph.D. in Computer Science, Computer Engineering, or Electrical Engineering is required.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.