Senior Principal Engineer, SoC / Chip Lead

Job Title

Senior Principal Engineer, SoC / Chip Lead

Role Summary

Lead end-to-end technical delivery for complex SoC programs from architecture through silicon production. Own planning, integration strategy, risk management, and tape-out readiness while coordinating cross-functional engineering teams.

Experience Level

Senior — requires extensive leadership experience in the semiconductor industry (20+ years indicated).

Responsibilities

Accountable for technical direction, execution, and successful first-pass silicon delivery.

• Provide technical leadership and drive decision-making across architecture, implementation, and product requirements.
• Define chip-level architecture, integration requirements, performance, power, and area targets.
• Plan and manage SoC schedules, tape-out readiness, risk mitigation, and cross-functional dependencies.
• Coordinate integration of subsystems and IP across RTL, verification, physical design, DFT, firmware, validation, and packaging.
• Partner with analog and SerDes teams to integrate high-speed interfaces and mixed-signal subsystems.
• Lead design and execution reviews, silicon readiness assessments, post-silicon debug, and productization activities.
• Mentor senior engineers and provide technical leadership across multiple engineering organizations.

Requirements

Must-have technical skills, experience, and leadership capabilities.

• 20+ years semiconductor industry experience with substantial leadership responsibility.
• Proven track record as a Chip Lead, SoC Lead, Technical Program Lead, or equivalent for large-scale ASIC/SoC products.
• Demonstrated success leading advanced-node SoCs, preferably at 3nm and/or 5nm nodes.
• Deep understanding of SoC architecture, integration methodologies, and full-chip development flows.
• Strong experience across RTL design, design verification, physical design, DFT, static timing analysis, low-power design methodologies, and silicon bring-up.
• Experience managing complex schedules, technical dependencies, and cross-functional execution across global teams.
• Strong communication, stakeholder management, and engineering leadership skills.

Preferred:

• Experience with high-performance switching silicon, NoC architectures, data-movement/interconnect fabrics, HBM-centric systems, or chiplet/multi-die architectures.
• Hands-on experience integrating high-speed SerDes, analog front-ends, mixed-signal IPs, and advanced PHYs.
• Knowledge of packaging technologies, signal integrity, and high-bandwidth/low-latency interconnects.
• Domain experience in AI, HPC, networking, connectivity, data-center, or memory infrastructure products.

Education Requirements

Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or a related discipline.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.