Senior Principal C++ Software Engineer
Join the Protium Software Development Team to develop and enhance an FPGA-based prototyping product used for pre-silicon software validation of system-on-chip designs. The role focuses on improving timing quality-of-results (QoR) and the performance of the Protium timing flow.
Work with a small engineering team to design and implement timing graph algorithms and flow optimizations for large-scale timing graphs, and to support the timing engine and overall flow.
Senior — requires substantial industry experience. Posted qualifications indicate 10+ years with a BS, 7+ years with an MS, or 5+ years with a PhD.
The role involves software design, implementation, optimization, and maintenance for timing-related components and flows.
Must-have technical skills and experience:
Nice-to-have:
Required education/experience combinations stated: BS with a minimum of 10 years' experience, or MS with a minimum of 7 years' experience, or PhD with a minimum of 5 years' experience. No specific field of study was specified and no explicit "equivalent experience" language appears.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
