The Senior Physical Design Methodology Engineer, PPA Fusion Compiler will join the Networking Silicon engineering team at NVIDIA. The role focuses on developing advanced physical design methodologies for the implementation of graphics processors and SoCs, aimed at improving performance, power, and area (PPA).
Senior level with a minimum of 5 years of experience in Physical Design Engineering.
The responsibilities include:
Applicants should possess the following:
A Master's degree in Electrical, Computer Engineering, Computer Science or equivalent experience is required.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
