Role Summary
The role involves being part of a dynamic global team focused on the development and enhancement of high-performance interface IPs at advanced technology nodes. As a Senior Physical Design Engineer, you will be responsible for implementing industry-leading methodologies and tools to drive innovation in CPU, GPU, and other semiconductor designs.
Experience Level
This position is suitable for highly experienced professionals with a minimum of 9 years in physical design, particularly those with expertise in low-power and high-performance methodologies.
Responsibilities
- Develop and enhance PPA methodologies for complex interface IPs.
- Implement high-performance designs using Synopsys tools like RTLA and Fusion Compiler.
- Drive flow development for optimization in design quality.
- Collaborate to solve design challenges and improve Quality of Results (QOR).
- Automate design processes with scripting languages to increase efficiency.
- Analyze and resolve synthesis and timing closure issues.
- Participate in technical reviews and promote best practices.
Requirements
- At least 9 years of experience in physical design, with a specific focus on advanced methodologies.
- Strong background in synthesis, timing closure, and power optimization.
- Hands-on experience with advanced process nodes (sub-5nm).
- Proficient in TCL, Perl, and Python for automation tasks.
- Solid understanding of RTL and design verification concepts.
- Bachelor’s or Master’s degree in Electrical Engineering or related field.
Education Requirements
Bachelor’s or Master's degree in Electrical Engineering or a related technical field is required.