Senior Physical Design Engineer

Role Summary

The Senior Physical Design Engineer will work as part of a global team focusing on physical design and methodology for next-generation high-performance processor chips. The role involves building the physical view of chips and ensuring the efficiency and robustness of the design process.

Experience Level

Senior

Responsibilities

Key responsibilities include:

• Designing and implementing the physical layout of complex chips.
• Running RTL code through synthesis and place and route (PnR) tools.
• Conducting timing analysis and power grid verification.
• Reviewing and optimizing completed runs and identifying errors.

Requirements

Applicants should meet the following requirements:

• Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
• Experience in Physical Design with a focus on block-level PNR for advanced CMOS processes is preferred.
• Familiarity with EDA tools for RTL Synthesis, Physical Design, and Static Timing Analysis is advantageous.
• Good communication skills in English, both written and verbal.
• Willingness to learn and volunteer for new opportunities.

Education Requirements

Minimum qualifications include a bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.