Role Summary
The Senior Physical Design Engineer will be responsible for implementing custom IP and SoC designs from RTL to GDS, ensuring the creation of a manufacturing-ready design database. The role involves overseeing various aspects of the physical design flow, including synthesis, place and route, and verification processes.
Experience Level
Senior-level with 5+ years of relevant experience.
Responsibilities
The key responsibilities of the role include:
- Perform physical design implementation for custom IP and SoC designs.
- Conduct all aspects of the physical design flow including synthesis, place and route, and reliability analysis.
- Oversee verification and signoff processes, ensuring compliance with design standards.
- Analyze design results and recommend improvements.
- Participate in the development of physical design methodologies and flow automation.
- Utilize expertise in PCIE or other IO protocols for logical partitioning and physical planning.
Requirements
Candidates should meet the following requirements:
- Bachelor's degree in Computer Engineering, Electronic Engineering, or related field.
- 5+ years of experience in physical design implementation and EDA tools.
- Hands-on experience in physical design signoff flows including STA, LEC, ERC, and DRC.
- Proficiency in scripting languages such as Perl, TCL, and Python, along with knowledge of VHDL and Verilog.
- Experience mentoring junior team members.
- Strong analytical, problem-solving, and team collaboration skills.
Education Requirements
Bachelor's degree in Computer Engineering, Electronic Engineering, or related field.
About the Company
Company: Altera
Headquarters: Bengaluru, Karnataka, India
Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

Date Posted: 2026-03-10