Senior Manager - SoC Verification

Job Title

Senior Manager - SoC Verification

Role Summary

Senior verification manager in the dsPIC Microcontroller Business Unit responsible for functional verification of next-generation microcontroller SoCs integrating ARM and proprietary cores. Lead SoC-level verification strategy, coordinate cross-functional activities, and mentor verification engineers to deliver production-ready MCU products.

Experience Level

Senior — requires 10+ years of SoC verification experience (as stated in the posting).

Responsibilities

Key responsibilities include:

• Lead and participate in a global team developing advanced microcontroller products.
• Plan and execute SoC-level design verification from architectural descriptions.
• Develop UVM/SystemVerilog testbenches and test suites; implement coverage-driven verification.
• Perform RTL and gate-level verification of microcontroller products.
• Analyze gate-level simulations and timing violations; coordinate with STA teams to resolve issues.
• Create functional-safety tests, perform fault-injection simulations, and analyze coverage.
• Debug complex full-chip issues and integrate module-level testbenches into full-chip regressions.
• Mentor junior engineers and drive adoption of automation and advanced verification techniques.

Requirements

Must-have technical skills and experience:

• 10+ years of experience in SoC verification.
• Expert-level SystemVerilog and UVM proficiency.
• Hands-on Formal Verification experience (property/connectivity checking) with tools such as JasperGold or VC Formal.
• Experience verifying SoCs with ARM Cortex-M cores and proprietary RISC architectures.
• Deep understanding of microcontroller peripherals (DMA, timers, ADC/DAC interfaces, security modules, functional-safety features).
• Strong knowledge of AMBA protocols (AHB, APB, AXI).
• Experience with static timing analysis (STA) and resolving timing violations.
• Experience defining coverage-driven verification metrics and managing large regression suites; module-level verification planning and TB development.

Nice-to-have:

• Gate-level simulation and power-aware verification experience.
• Post-silicon validation experience and alignment of post-silicon plans with pre-silicon tests.
• Analog mixed-signal (AMS) simulation exposure.
• Familiarity with functional safety standards such as ISO 26262.

Education Requirements

Bachelor of Engineering (BE) in Electronics/Electrical Engineering or Computer Science is specified.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.