The Senior Manager of SoC Engineering will oversee the end-to-end design and verification of advanced semiconductor subsystems. This role requires a strong alignment between technical expertise and managerial skills to drive high-quality, timely project delivery within the Digital IP Subsystems Team.
Candidates should have a minimum of 15 years of industry experience, with at least 8 years in a management role overseeing both remote and local teams. Experience in Subsystem or SoC design, as well as comprehensive hands-on technical experience across various engineering disciplines, is crucial.
Prospective candidates must demonstrate proficiency in Verilog/System Verilog, experience with interface protocols such as AMBA, DDR, and PCIe, and capability in tools relevant to verification, synthesis, and design closure. Additionally, outstanding communication skills and a commitment to team development are essential for success in this managerial position.
A Bachelor’s or Master’s degree in Electronics or a related field is required.