Senior Manager - Silicon Design Engineering

Role Overview

The Senior Manager of Silicon Design Engineering will lead a team in the development of innovative silicon solutions. This role involves collaboration with internal teams and external partners, focusing on the design and execution of cutting-edge technologies within the Computing and Graphics Group.

Experience Level

The ideal candidate will possess 12-15 years of full-time experience in IP hardware design, with proven management skills in leading engineering teams, in addition to proficiency in RTL logic design.

Key Responsibilities

• Lead a distributed engineering team, ensuring high performance and collaboration.
• Mentor and coach team members to develop their skills and enhance productivity.
• Design IP and subsystems while integrating AMD's and third-party IPs.
• Support the IP lifecycle through verification, implementation, synthesis, and static timing analysis.
• Partner with SOC teams for IP level support, covering connectivity, DFT, verification, and post-silicon activities.

Preferred Qualifications

• Extensive expertise in Verilog/System Verilog RTL design of high-speed, multi-clock digital systems.
• Experience with Verilog lint tools (e.g., Spyglass) and simulation tools (e.g., VCS).
• Strong knowledge of SoC design flows and power management techniques.
• Excellent communication and interpersonal skills to liaise with cross-functional teams.
• Strong analytical and problem-solving capabilities.

Education Requirements

A Bachelor's degree in Computer Engineering or Electrical Engineering is required, with 15 years of relevant experience; or a Master's degree along with 12 years of experience in IP hardware design.