Senior Manager - RTL Design

Role Overview

The Senior Manager - RTL Design role is focused on leading a team dedicated to developing cutting-edge DDR IP technology. Candidates will be responsible for managing a high-performance design team and ensuring timely silicon delivery through collaboration across various engineering disciplines.

Experience Level

This position requires significant expertise, with a minimum of 15 years in digital logic design and at least 2 years in a people management role focused on employee development and mentoring.

Key Responsibilities

• Deliver industry-leading DDR IP solutions with a focus on speed, efficiency, and performance.
• Lead technical execution of RTL design processes from micro-architecture to production.
• Collaborate with interdisciplinary teams including architecture and verification for streamlined product success.
• Manage and mentor a team of RTL design engineers, promoting a culture of continuous improvement.
• Establish methodologies and coding best practices to ensure robust design execution.

Skills Required

Expertise in Verilog/System Verilog, strong analytical skills, and excellent communication abilities are essential. Familiarity with high-speed design, computer architecture, and digital logic verification is also crucial. The ideal candidate should be a self-starter capable of independently managing tasks.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required.