Senior Manager, ASIC Design

Role Overview

The Senior Manager, ASIC Design will lead the ASIC design team, overseeing high-performance chip design projects from conception to execution. This role requires technical expertise in ASIC design flows and strong leadership skills to ensure timely project completion within company objectives.

Experience Qualification

A minimum of 8 years of digital ASIC design experience and at least 3 years in a management role are required. Applicants should demonstrate proven leadership and communication skills, as well as the capability to manage risks and deliver projects on tight schedules.

Key Responsibilities

• Lead and manage a high-performing team to execute ASIC design projects for Celestial AI’s photonic fabric.
• Define and manage project schedules, milestones, and budgets to achieve high-quality design outcomes.
• Provide technical direction in defining specifications and design methodologies, and conduct design reviews.
• Collaborate with teams in architecture, verification, and post-silicon to ensure functional system integration.
• Mentor team members and foster professional growth within the team.
• Manage relationships with external vendors, addressing any design dependencies efficiently.

Required Skills

• Master’s or Bachelor’s in Electrical or Computer Engineering or related field.
• Strong expertise in ASIC/SOC development, microarchitecture, RTL coding preferences (Verilog/SystemVerilog), and design optimizations.
• Proficiency in full ASIC design cycle knowledge from microarchitecture to tape-out experience.
• Experience in industry standards such as CXL, PCIe, and HBM.
• Ability to drive designs optimized for power, performance, and area considerations.

Education Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline is essential. A PhD is preferred but not mandatory.