Senior Manager, ASIC Design

Role Overview

We are seeking a Senior Manager for ASIC Design to lead our ASIC chip design team at Marvell Technology. You will manage a dedicated team and oversee the end-to-end design and development of high-performance ASICs, ensuring that projects are delivered on time and meet company goals. This role requires innovative leadership along with technical prowess in ASIC design methodologies.

Experience Level

Candidate should possess a Bachelor’s degree in Computer Science, Electrical Engineering, or a related discipline with 5-10 years of professional experience. Alternatively, a Master’s or PhD in the same fields with 3-5 years of relevant experience will be considered.

Key Responsibilities

As a Senior Manager, your primary responsibilities will include:

• Managing an ASIC chip design team and ensuring technical excellence throughout the development cycle.
• Coordinating and supervising multiple projects, handling risks and escalations, and ensuring adherence to deadlines and budgets.
• Driving the technical strategy for ASIC/SOC design from microarchitecture development to final tape-out.
• Integrating various subsystems for optimum performance, power, and area.
• Utilizing industry-standard tools and methodologies for design, verification, and automation.

Required Skills

The ideal candidate should possess:

• 8+ years of experience in ASIC/SOC digital design and 3+ years in a management role.
• Strong knowledge of the ASIC/SOC development cycle and microarchitecture design.
• Hands-on experience with Verilog/SystemVerilog, timing analysis, physical design, and verification methodologies.
• Knowledge of standard protocol stacks such as CXL, PCIe, HBM, or UCIe.
• Exceptional communication, leadership, and team-building abilities.

Education Requirements

Bachelor’s or higher in Computer Science, Electrical Engineering, or a related field is required. Equivalent professional experience will also be considered in lieu of formal education.