Senior Manager, Analog Methodology and AI Innovation

Job Title

Senior Manager, Analog Methodology and AI Innovation

Role Summary

Lead the Analog Integration Team to define and execute analog and adjacent-domain methodology for mixed-signal and special-purpose silicon. Drive methodology ownership, prioritize customer-driven requirements, and coordinate deployment across product, foundry, and engineering teams.

The role combines hands-on technical leadership in transistor-level methodology, simulation, and verification with program management and customer-facing responsibilities to accelerate adoption of application-optimized IP.

Experience Level

Senior - position expects extensive industry experience. The posting specifies 18–25 years of IC design experience with a BSEE, or 15–18 years with an MSEE or PhD.

Responsibilities

You will own methodology areas and lead cross-functional execution:

• Own analog and adjacent-domain methodology areas end-to-end: prioritization, adoption, and execution.
• Act as primary interface for customer-driven methodology requirements and integration challenges.
• Coordinate methodology deployment across product teams, adjacent engineering organizations, and foundries.
• Define escalation paths, ownership boundaries, and measurable objectives for methodology delivery.
• Support methodology for application-optimized IP and special-purpose silicon targeting specific workloads and system architectures.
• Manage staffing, budgets, schedules, and operational objectives for methodology resources.

Requirements

Must-have technical and leadership skills; list reflects core expectations for immediate effectiveness in the role.

• Deep expertise in analog design methodology, mixed-signal workflows, and transistor-level simulation.
• Strong command of CMOS fundamentals, reliability effects, SPICE-based verification, and static timing concerns applicable to analog/mixed-signal.
• Proven experience executing analog methodology for special-purpose or application-optimized silicon.
• Experience managing teams or methodology resources with accountability for staffing, budgets, schedules, and measurable results.
• Customer-facing experience and credibility with product teams and foundries; ability to influence senior stakeholders.
• Proficiency in scripting and automation to streamline design and verification flows.

Nice-to-have:

• Practical application of AI/ML techniques to analog circuit optimization and methodology automation.
• Experience integrating circuit-to-layout, circuit-to-timing, and silicon-to-lab correlation workflows.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field is stated; MSEE or PhD is preferred. The posting defines experience equivalencies: 18–25 years of IC design experience with a BSEE, or 15–18 years with an MSEE or PhD.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.