Senior Logic Design Verification Engineer
The Power Management Controller (PMC) Logic Design Verification team verifies system boot and power-management IP for client and server chipsets. This role develops verification environments, builds RTL models, and validates architectural features across IP and system platforms in collaboration with architects and manufacturing/validation partners.
Senior-level — typically requires at least 15 years of relevant design verification experience, particularly with UVM and SystemVerilog.
Primary responsibilities include:
Must-have and preferred qualifications:
Possess a Bachelor's, Master's, or Ph.D. in Electronics Engineering, Computer Engineering, or a related technical field — or equivalent practical experience.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
