Senior Lead RTL Design Engineer

Role Overview

As a Senior Lead RTL Design Engineer in the Data Fabric Team at Advanced Micro Devices, you will engage in designing cutting-edge data fabric IP RTL components. Your focus will be on micro-architecting and delivering designs that meet power, performance, and area specifications.

Your Experience Level

This position is intended for individuals with a strong foundation in RTL design, particularly those with experience in Verilog/SystemVerilog. Ideal candidates will possess skills in communication, problem-solving, and attention to detail while collaborating with senior architects and design engineers.

Key Responsibilities

• Define features and capabilities of Data Fabric to meet SoC power, performance, and area targets.
• Implement digital design and micro-architecture for components of the Infinity Data Fabric, including cache designs.
• Perform micro-architecture and RTL coding using Verilog/SystemVerilog.
• Lead design efforts in relevant areas of expertise.
• Collaborate with architects and design leads to identify technical issues.
• Work closely with verification teams to ensure quality in component development.
• Partner with Physical Design teams to meet quality PPA targets.
• Provide post-silicon support to ensure successful designs during bring-up.

Job Requirements

Qualified candidates should exhibit a solid understanding of fabric architecture and coherency, alongside experience with memory/cache design.

Education Requirements

A Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required.