Senior FPGA Engineer (Onsite)

Role Summary

The Senior FPGA Engineer will be engaged in the design, implementation, verification, and integration of high-performance digital ASICs, FPGAs, and circuit boards related to computer graphics and communication signal processing.

Experience Level

Level - Senior

Responsibilities

• Identify requirements capture, ASIC/FPGA digital architecture, design using RTL, timing closure, verification, and system integration.
• Recommend new tools and practices for continuous improvement in the ASIC/FPGA design flow.
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project design teams by planning activities and reporting status.

Requirements

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of relevant experience or an Advanced Degree with 3 years experience.
• Experience in RTL coding and simulation in Verilog or VHDL.
• Experience in digital circuit architecture, design, and timing analysis.
• Experience in Testbench development for the verification of RTL blocks using System Verilog.
• Proficient with ASIC and/or FPGA simulation and synthesis tools.
• Familiarity with revision control concepts and tools (e.g., Git, Subversion).

Education Requirements

A degree in a relevant STEM field is required.