Senior FPGA Engineer

Role Summary

The Senior FPGA Engineer will focus on creating and implementing FPGA solutions for the low Earth orbit (LEO) satellite communication system. The role emphasizes developing new systems with minimal constraints, allowing for innovative FPGA designs using the latest technologies and methodologies.

Experience Level

This position is tailored for candidates with a minimum of 7 years of experience specifically in FPGA design, showcasing a robust understanding of digital design and communication protocols.

Responsibilities

• Design and develop complex FPGA architectures using Verilog HDL to enhance satellite communication systems.
• Lead FPGA design initiatives for the Versal ACAP and IGLOO2 platforms from concept through production.
• Perform comprehensive timing analysis, synthesis, place and route tasks, as well as design verification.
• Produce detailed test benches and simulation environments for effective FPGA testing.
• Collaborate with cross-functional teams to integrate hardware, software, and system architecture aspects.
• Debug and troubleshoot both simulation and hardware-level FPGA designs.
• Prepare technical documentation including specifications, test plans, and user guides.
• Support hardware integration and oversee production deployment activities.

Requirements

Candidates must hold a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field, paired with extensive FPGA design experience. Proficiency in Verilog HDL, familiarity with FPGA design tools, and strong problem-solving skills are mandatory.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.