Senior Formal Verification Engineer

Role Overview

The Senior Formal Verification Engineer at Advanced Micro Devices (AMD) is responsible for leading formal verification efforts for complex GFXIP blocks. This role involves close collaboration with design and architecture teams to develop verification plans and improve overall quality metrics for high-impact designs.

Experience Level

This position is suitable for candidates with substantial background in formal verification and digital design, particularly those approaching or at a senior level.

Core Responsibilities

The responsibilities include owning formal verification plans for assigned blocks, developing properties from design specifications, maintaining high-quality formal testbenches, and applying advanced verification techniques to ensure comprehensive coverage and convergence metrics.

• Develop and execute formal verification plans for GFXIP blocks with guidance from FV tech leads.
• Collaborate with design teams to clarify specifications and enhance verifiability.
• Maintain formal testbenches and assertion libraries, ensuring property quality.
• Optimize convergence and throughput through techniques like abstraction and invariants.
• Conduct efficient debugging of counterexamples and provide actionable insights.
• Document verification plans, status updates, and learnings for stakeholders.
• Mentor junior engineers through knowledge sharing and reviews.

Qualifications

Required qualifications include a strong foundation in digital design/verification, advanced SystemVerilog Assertion skills, and proficiency with formal verification tools. Candidates should demonstrate ownership experience in formal verification for complex systems and possess scripting capabilities for test automation.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required.