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Senior Firmware ASIC Digital Design Engineer

Synopsys
Full-time
On-site
Porto Salvo, Lisbon District, Portugal
Level - Senior

Role Overview

The Senior Firmware ASIC Digital Design Engineer will engage in advanced architectural methodologies and design practices for FPGA-based digital systems. The successful candidate will play a critical role in the development lifecycle from system requirements to deployment, ensuring high-performance outcomes aligned with industry standards.

Experience Level

This position is suited for those at a Senior level, with a deep understanding of digital design and ASIC methodologies, looking to leverage their skills in a dynamic engineering environment.

Key Responsibilities

  • Design and implement complex digital circuits for ASIC and FPGA environments.
  • Collaborate with cross-functional teams to define and refine system specifications.
  • Participate in design reviews to ensure design quality and mitigate risks.
  • Develop verification strategies and oversee the testing of your designs.
  • Document design processes and architectural choices for internal records.
  • Stay updated with the latest tools and technologies in digital design.

Required Qualifications

Applicants should bring a strong background in digital electronics, particularly in ASIC design principles. Proven expertise in FPGA design tools such as VHDL or Verilog is essential, alongside hands-on experience in hardware/software integration.