Senior Engineer - Standard Cell Design
Micron TechnologyJob Title
Senior Engineer - Standard Cell Design
Role Summary
Design, characterize, and release standard cell libraries for new DRAM products and emerging process technologies. Collaborate with DTCO, design teams, and international colleagues to deliver timing/power models, automation, and validation for production libraries.
Work involves developing automation, flows, and AI-assisted solutions to improve design and characterization productivity. For application assistance, contact hrsupport_india@micron.com.
Experience Level
Senior — experienced engineer; specific years of experience not stated.
Responsibilities
Primary responsibilities include:
- Design, layout, and maintain standard cells for new DRAM products.
- Collaborate with DTCO to define standard-cell architecture for emerging technologies.
- Characterize cells and produce timing/power models and liberty files; perform quality analysis on performance, power, and functionality.
- Develop automation testbenches, flows, and tools to improve efficiency and support data analysis.
- Set up RTL/GDS flows and perform block-level timing analysis to support library release.
- Cooperate with international teams to develop new flows, tools, and AI-based automation solutions for standard-cell design and characterization.
Requirements
Must-have and preferred technical skills:
- Must-have: Strong understanding of CMOS circuit design, device physics, and layout; hands-on experience in standard-cell design, layout, and verification.
- Experience with characterization and timing tools (e.g., PrimeTime, Solido Analytics) and familiarity with characterization tools such as Siliconsmart/Liberate.
- Familiarity with analog/digital simulation tools (HSPICE, HSIM, Verilog, FINESIM, Simvision).
- Experience with scripting/automation (Skill, TCL, Perl, Python) for testbench automation and data analysis.
- Experience with FinFET and planar process technologies.
- Good interpersonal and communication skills; ability to work effectively in cross‑functional teams.
- Experience using AI-assisted tools to improve standard-cell design and characterization productivity, with emphasis on correctness and validation.
- Nice-to-have: Experience with Cadence Virtuoso, Synopsys ICC2, Synopsys EDA flows, RTL/GDS flow setup, and prior DRAM or analog-block experience.
Education Requirements
Not specified.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.
