Senior Engineer, Analog/IO Layout Design

Job Title

Senior Engineer, Analog/IO Layout Design — Noida, India

Role Summary

Responsible for physical layout of analog and I/O circuits, ensuring manufacturability and tapeout readiness. Works within a mixed-signal/hardware engineering team to translate schematic and floorplan requirements into completed layout blocks.

The role requires coordination with circuit designers, verification, and process engineers to meet performance, reliability, and schedule targets.

Experience Level

Senior-level. Specific years of experience not specified in the source.

Responsibilities

Key responsibilities include layout implementation, physical verification, and cross-team collaboration.

• Create and optimize physical layouts for analog and I/O circuits to meet electrical and manufacturability constraints.
• Run and interpret DRC/LVS and other physical verification checks; resolve violations and iterate with design and process teams.
• Perform floorplanning, placement, routing, and parasitic-aware layout practices for mixed-signal blocks.
• Prepare layout deliverables for tapeout and support post-layout debugging and bring-up activities.
• Collaborate with circuit designers, verification engineers, and process engineers to meet performance and schedule targets.
• Provide technical mentorship to junior layout engineers and participate in design reviews.

Requirements

Must-have and preferred technical requirements for the role.

• Must-have: Hands-on experience in analog/IO layout and physical verification (DRC/LVS) in production flows.
• Must-have: Proficiency with standard layout tools and flows (e.g., Cadence Virtuoso and related physical verification tools).
• Must-have: Practical knowledge of layout best practices: matching, parasitics, EM/IR considerations, and PDK usage.
• Must-have: Scripting ability for automation (examples: Skill, Python, Tcl) and attention to detail to meet tapeout schedules.
• Must-have: Ability and willingness to work onsite in Noida and collaborate across functional teams.
• Nice-to-have: Experience with advanced process nodes, mixed-signal SoC layout, or prior mentorship responsibilities.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.