Senior Engineer

Role Summary

As a Senior Engineer in Arm's Solutions Engineering group, you will focus on optimizing physical designs within System-on-Chip (SoC) development. This role involves critical participation in chip implementation methodologies, particularly in enhancing performance and power efficiency through advanced Physical Design (PNR) techniques.

Experience Level

5 - 12 years of experience in Backend Physical Design.

Responsibilities

• Optimizing power distribution networks and assessing IR-drop for high-end compute SoCs.
• Planning of PG grid and managing bump-planning and RDL closure of subsystems.
• Collaborating with cross-functional teams to refine PNR methodologies and enhance EDA tools.

Requirements

• Hands-on experience with PNR tools such as Innovus and Fusion Compiler.
• Proficiency with sign-off tools like Red-Hawk and Calibre.
• Familiarity with scripting languages like TCL, Perl, and optionally Python.
• Good knowledge in PNR and STA is an advantage.

Education Requirements

Bachelor's degree in Electrical Engineering or a related field is preferred.