Job Title
Senior Director, Physical Design
Role Summary
Lead and manage the physical design organization responsible for backend implementation of SoC products. The role drives physical design strategy, execution, quality, schedule and cross-functional coordination with front-end design, CAD, verification, and marketing teams.
This position reports to senior leadership and focuses on delivering tapeouts on schedule and within performance, area, and power targets while building and mentoring a high-performing engineering team.
Experience Level
Senior — leadership/management role. Senior-level technical and managerial experience expected; typically 10+ years in physical design or related ASIC/SoC implementation roles with several years leading teams.
Responsibilities
Primary responsibilities include technical leadership, people management, and delivery oversight.
- Define and execute physical design strategy and methodology across multiple projects and technology nodes.
- Manage, mentor, and grow a team of physical design engineers and leads.
- Coordinate cross-functional activities with front-end design, timing closure, verification, CAD, layout, and foundry teams.
- Drive schedule planning, risk management, and resolution to meet tapeout milestones.
- Ensure design quality through reviews, sign-off criteria, and adherence to design-for-manufacturability rules.
- Evaluate and adopt EDA tools, flows, and automation to improve productivity and quality.
- Participate in technical reviews and provide guidance on architecture trade-offs affecting physical implementation.
Requirements
Key must-have and preferred qualifications for the role.
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Must-have: Extensive experience leading physical design teams for complex SoCs; hands-on understanding of digital backend flows (place-and-route, timing closure, ECO, sign-off).
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Must-have: Proven track record of multiple successful tapeouts and meeting performance/area/power targets.
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Must-have: Strong familiarity with common EDA tools and flows used in physical implementation and sign-off.
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Must-have: Experience coordinating with front-end, CAD, verification and foundry partners; strong program and risk management skills.
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Nice-to-have: Experience with advanced nodes (7nm, 5nm or below), mixed-signal integration, SerDes or high-speed PHYs, and development of automation/scripting to accelerate flows.
Education Requirements
Not specified.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-04-29