Senior Director, IO Analog Design Engineering

Role Summary

The Senior Director of IO Analog Design Engineering leads Intel's Hard IP and Test Chip Development team, focusing on the creation of analog and mixed signal IP for various customer segments including Client, Datacenter, AI, and Foundry. This position drives the direction of high-speed serial IO and die-to-die interfaces and is pivotal in shaping the future of IO technology at Intel.

Experience Level

This role is suitable for individuals with significant leadership experience, specifically those with over 12 years in the electrical engineering or computer science sector, along with 10+ years of experience managing analog IP design teams.

Responsibilities

• Define and refine multi-generational roadmaps for HSIO and D2D IP development, aligning with market trends and architectural shifts.
• Engage with senior architects and executives to establish execution plans and define IP landing zones.
• Oversee IP development across architecture, logic, validation, and analog design teams, ensuring timely delivery.
• Manage schedules and resource allocation across functional teams, addressing competing requirements effectively.
• Lead and nurture a global engineering team, promoting a transparent and efficient development culture.
• Drive the integration of AI solutions to enhance development processes and efficiency.

Requirements

Candidates must possess a Bachelor's degree in Electrical Engineering, Computer Science, or a related field, with a deep understanding of analog IP development. Applicants should have proven track records in leading silicon teams and navigating complex customer negotiations. Knowledge of high-speed serial IO technologies such as PCIe/CXL and USB Type C is essential.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or a related field is required.