Senior DFT Engineer

Role Summary

The Senior DFT Engineer will architect, implement, and validate innovative DFT techniques on ARM SoCs. This role requires collaboration with front-end design and verification teams, back-end synthesis, and timing closure efforts, as well as silicon characterization and validation.

Experience Level

Senior level with 10-20 years of experience in DFT engineering.

Responsibilities

The responsibilities include:

• Architecting and validating DFT techniques on ARM SoCs.
• Inserting DFT logic into SoC designs at the RTL and gate levels.
• Validating features and generating ATE targeted test patterns.
• Collaborating with design, verification, and timing closure teams.
• Conducting silicon characterization and validation.

Requirements

Must-have skills and experiences include:

• Core DFT skills: Scan compression, Memory BIST, Logic BIST, and JTAG/IJTAG.
• Proficiency in Verilog RTL, TCL, and Perl.
• Experience in Unix/Linux environments.
• Bachelor's or Master’s degree in Electronic Engineering, Computer Engineering, or related field.

Nice-to-have skills include familiarity with IEEE standards, SoC architecture, and Siemens DFT tools.

Education Requirements

Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, or a related field.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.