Senior DFT ATPG Engineer

Role Summary

The Senior DFT ATPG Engineer will be part of the Design-for-Test Engineering team at NVIDIA, responsible for developing next-generation DFT technologies and solutions for sophisticated semiconductor chips. This role involves collaboration with various groups including chip design, verification, and production testing.

Experience Level

Senior - Requires 5+ years of experience in DFT/ATPG.

Responsibilities

The key responsibilities include:

• Managing state-of-the-art Design for Test/ATPG flows and implementation.
• Taking full ATPG ownership on projects, from architecture and planning to pattern generation and verification.
• Inventing and maintaining automation flows to minimize test time to production.

Requirements

Must-have skills and experiences include:

• 5+ years of hands-on DFT/ATPG experience including technical knowledge.
• Experience with Mentor TestKompress ATPG tool.
• Strong programming skills in scripting languages.
• BSc. in Electrical Engineering or Computer Engineering.
• Proactive and self-motivated with a sense of ownership.

Nice-to-have skills:

• Knowledge of DFT techniques such as scan, BIST, on-chip scan compression.
• Experience with ATE and Silicon bring-up.
• Familiarity with programming languages like TCL, PRL, Python, and Unix shell scripts.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.