Role Summary
The role of a Senior Design Verification Lead involves driving the verification of high-performance fabric IP within AMD’s Infinity (Data) Fabric team. The individual in this position will take on a leadership role in defining verification strategies, ensuring excellence in methodologies, and mentoring fellow engineers while collaborating cross-functionally to achieve success in silicon delivery.
Experience Level
This position is designated for professionals at the senior level with substantial experience in design verification engineering.
Responsibilities
The key responsibilities for this role include:
- Overseeing the verification strategy and execution for complex Data Fabric IP blocks from specification review through tape-out.
- Defining UVM-based testbench architecture for scalability, reusability, and high coverage models.
- Leading the creation and approval of test plans with a combination of constrained-random and directed testing.
- Implementing coverage-driven verification methodologies to track and fulfill functional and code coverage goals.
- Working closely with architecture and design teams to resolve intricate issues and ensure successful silicon outcomes.
- Mentoring junior verification engineers by reviewing their test plans, code, and coverage analyses.
- Driving automation and process optimizations to improve verification methodologies and team productivity.
- Participating in post-silicon debugging and validation processes, assisting in the diagnosis of issues observed in laboratory setups or customer systems.
Requirements
Candidates must have a robust expertise in SystemVerilog and UVM, having led verification efforts on significant ASICs or SoCs. Other requirements include:
- A strong understanding of computer architecture and fabric protocols.
- Proficiency in using EDA tools such as Synopsys VCS.
- Advanced debugging capabilities for simulations and waveform analyses.
- Scripting skills in languages like Python or Perl for automation tasks.
- Experience with verification metrics and closure strategies, including regression management.
- Familiarity with formal verification methods and tools is advantageous.
Education Requirements
Applicants should possess a Bachelor’s or Master’s degree in computer engineering or electrical engineering.