Senior Design Verification Engineer - PCIE

Role Overview

The Senior Design Verification Engineer will be engaged in the verification of PCI Express controllers used in NVIDIA's cutting-edge GPUs and SOCs. This role involves creating scalable and reusable test benches that will span various verification methodologies across a range of products.

Experience Level

This position is targeted towards candidates with a Bachelor’s or Master’s degree coupled with a minimum of 5 years of experience in unit, sub-system, or SOC level verification.

Key Responsibilities

• Verification of ASIC designs, architecture, and microarchitecture of PCI Express controllers across multiple product generations.
• Development of UVM or Specman/e based testbench components that are reusable across different verification environments.
• Enhancement of existing testbench components, including monitor, checker, and scoreboard integration following coverage-based verification methodologies.
• Understanding verification scope and specifications, defining new requirements as necessary.
• Collaboration with cross-functional teams including verification teams, architects, and designers.

Candidate Requirements

• Strong expertise in SystemVerilog and industry-standard IP verification, particularly with interconnect protocols such as PCI Express, CXL, UCIe, USB, and SATA.
• Proficient in functional coverage based constrained random verification environments.
• Familiarity with verification methodologies like UVM and Specman/e.
• Experience with standard verification tools for simulation and debugging.
• Excellent debugging, analytical, and interpersonal skills.

Education Requirements

Applicants must possess a Bachelor’s or Master’s degree in a relevant field.