Senior Design Engineering Architect

Role Summary

The Senior Design Engineering Architect role involves designing verification for interconnect IP, ensuring the execution of verification plans, and working with cross-functional teams to achieve coverage objectives.

Experience Level

Senior, with over 8 years of design verification experience required.

Responsibilities

Key responsibilities include:

• Design verification for interconnect IP.
• Crafting and executing verification plans for complex designs.
• Collecting and closing coverage.
• Collaborating with cross-functional teams (DV/Arch/Design/FW) to identify coverage scope.

Requirements

Must-have skills and experience:

• 8+ years of design verification experience.
• BS (or higher) in Electrical Engineering or Computer Engineering.
• Strong technical and interpersonal skills.
• Excellent knowledge of interconnects, NoCs, and design verification fundamentals.
• Understanding of System Verilog, UVM, and programming languages for testbenches.
• Experience with developing automated flows and exposure to scripting languages like Perl or Unix shell.
• Experience with Formal Verification and Gate Level Simulations is a plus.
• Excellent written and oral communication skills.

Education Requirements

BS (or higher) in Electrical Engineering or Computer Engineering required.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.