Role Summary
This role entails development of SoCs for various application segments using the latest IP products from Arm. As a Senior Design Engineer, you will be responsible for debugging subsystems, primarily based on CoreSight IPs, and play a key part in the specification, design, and verification processes.
Experience Level
Level - Senior
Responsibilities
- Define and document micro-architecture specifications.
- Develop RTL implementations.
- Perform comprehensive design checks to ensure correctness and quality.
- Collaborate closely with the verification team to assess test coverage, review verification plans, and assist in debugging and resolving design defects.
Requirements
- Bachelor's or Master’s degree in Computer Science, Electrical/Computer Engineering or a similar related field.
- More than 5 years of experience in design of complex subsystems or SoCs.
- Experience with ARM-based designs and ARM System Architectures.
- Hands-on experience with Arm CoreSight IP and debug/trace architectures.
- Advanced proficiency in SystemVerilog and Verilog.
- Experience with power, clock domain crossing, and reset domain crossing.
- Experience with Perl, Python or other scripting languages.
Education Requirements
Bachelor's or Master's degree in Computer Science, Electrical/Computer Engineering or a similar related field.