Job Title
Senior CPU Physical Design Engineer
Role Summary
The Senior CPU Physical Design Engineer will execute and improve backend physical design flows for Intel's E-Core/Atom microprocessor teams. The role focuses on RTL-to-GDS implementation, physical verification and signoff, PDK and library validation, and automation to deliver high-performance, low-power CPU designs.
This position works within a multi-disciplinary silicon design organization and requires close collaboration with logic, circuit, CAD/EDA, and tool vendors. The work directly impacts CPU performance-per-watt and manufacturability.
Experience Level
Senior level. Typical background: Bachelor’s degree + 5+ years relevant experience, or Master’s degree + 3+ years relevant experience (see Education Requirements for details).
Responsibilities
Key responsibilities include end-to-end backend physical design, verification, validation, and automation.
- Qualify and validate new PDK versions and standard cell libraries for RTL-to-GDS flows (synthesis & APR) and custom verification flows.
- Perform verification and signoff activities: formal equivalence checks, static timing analysis, reliability verification, DRC/LVS, noise and electromigration analysis.
- Maintain and manage design data management repositories used by the design teams.
- Execute physical design flow stages: synthesis, floorplanning, placement & routing, STA, power and reliability analysis.
- Collaborate with logic, circuit, and design automation teams to improve microarchitecture and implementation quality.
- Engage with EDA vendors to improve tool capabilities and methodologies for high-speed, low-power CPU design.
- Develop and maintain scripts and automation for implementation stages, verification, and quality analysis.
- Contribute to the development and improvement of physical design methodologies and flow automation processes.
Requirements
Minimum technical skills and experience required. Preferred skills listed separately.
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Must-have: Substantial hands-on experience with industry-standard physical design and verification tools (examples include Synopsys Fusion Compiler, Cadence Genus/Innovus, PrimeTime).
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Must-have: Experience validating PDKs, standard cell libraries, and backend tool flows; performing regression tests and tool validation.
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Must-have: Proficiency in scripting and automation (TCL, Perl, Python) and experience with source control.
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Must-have: Experience with design database management tools such as Perforce and Git.
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Nice-to-have: Deep expertise in CAD flows for chip-level physical verification, electrical rule checking, and STA for worst-case corners.
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Nice-to-have: Familiarity with applying machine learning techniques to design optimization and leveraging modern code-assist tools (e.g., VS Code co-pilot) for analysis and debug.
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Nice-to-have: Strong communication and collaboration skills across geographically distributed teams.
Education Requirements
Bachelor's degree in Computer Engineering, Electrical Engineering, or a similar technical discipline with 5+ years of relevant experience, OR Master's degree in Computer Engineering, Electrical Engineering, or a similar technical discipline with 3+ years of relevant experience. Relevant experience may be obtained through a combination of degree, research, prior employment, or internships (i.e., equivalent practical experience is acceptable).
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

Date Posted: 2026-04-29