Senior ASIC/FPGA Verification Engineer (Onsite)

Job Title

Senior ASIC/FPGA Verification Engineer (Onsite)

Role Summary

Senior engineer on the Applied Research and Technology Microelectronics Technology team responsible for chip-level verification of high-performance digital FPGAs and ASICs used in mission systems. Work focuses on verification environment architecture, testbench development, and integration with design teams for defense and aerospace applications.

Experience Level

Senior. Typically requires a Bachelor's degree in a STEM field plus a minimum of 5 years of relevant experience, or an advanced degree in a related field with a minimum of 3 years of relevant experience.

Responsibilities

Primary responsibilities include architecture, implementation, and execution of verification for ASIC/FPGA designs.

• Design verification environments using SystemVerilog with OVM/UVM.
• Create written test plans, testcases, and track code and functional coverage.
• Develop testbenches for RTL blocks using VHDL and/or SystemVerilog.
• Collaborate with design engineers on integration and validation of ASIC/FPGA solutions.
• Provide technical guidance and mentorship to junior engineers.
• Provide technical leadership for verification tasks: break down work, plan activities, and report status.
• Contribute to engineering estimates for new program pursuits.

Requirements

Key must-have skills and constraints, followed by preferred qualifications.

• Must-have: Active, transferable U.S. government SECRET security clearance required prior to start; U.S. citizenship required.
• Demonstrated experience developing and simulating RTL using VHDL and/or Verilog in a professional FPGA or ASIC environment.
• Proven ability to design, implement, and execute verification testbenches for RTL using VHDL and/or SystemVerilog.
• Working knowledge of chip-level verification methodologies: constrained-random testing, functional coverage, and assertion-based verification (SystemVerilog).
• Experience with SystemVerilog verification environment architecture and OVM/UVM.
• Proficiency with revision control concepts and tools (e.g., Git, Subversion).
• Experience providing technical leadership or mentoring within verification teams.

Nice-to-have:

• Experience with high-speed digital interfaces and protocols (DDR, PCIe, Ethernet).
• ASIC/FPGA lab validation and debug experience using standard lab equipment.
• Familiarity with QuestaSim, Synplify, Quartus, or Vivado.
• Proficiency with Unix/Linux environments and scripting.
• Background in aerospace, defense, or mission-critical systems.

Education Requirements

Typically requires a Bachelor's degree in Science, Technology, Engineering, or Mathematics (STEM) plus a minimum of 5 years prior relevant experience, or an advanced degree in a related field with a minimum of 3 years prior relevant experience. No specific certifications were listed.

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.