Senior ASIC Digital Verification Engineer

Role Summary

The Senior ASIC Digital Verification Engineer will be responsible for verification of complex ASIC designs. This role involves developing test plans, writing and executing test scenarios while collaborating in a multidisciplinary team.

Experience Level

This position is suited for candidates with significant experience in ASIC digital design verification and has a senior-level focus.

Responsibilities

• Develop, implement, and maintain verification plans for advanced digital components.
• Write and execute verification testbenches using SystemVerilog and UVM methodologies.
• Analyze simulation results, identify, and debug issues reported during verification.
• Support design teams in verification tasks throughout the development process.
• Collaborate with team members to set and achieve department goals.

Requirements

Applicants should possess comprehensive knowledge of digital design concepts and experience using simulation tools. Strong troubleshooting and communication skills are essential for success in this role.

Education Requirements

A Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or a related field is required.