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Senior ASIC Digital Design Engineer (DFT)

Synopsys
Full-time
On-site
Ho Chi Minh City, Vietnam
Level - Senior

Job Summary

We are seeking a Senior ASIC Digital Design Engineer with a focus on Design for Test (DFT) to contribute to our engineering team. The individual will be responsible for implementing robust DFT methodologies in the design of complex digital ASICs, ensuring high test coverage and reliability.

Role Overview

This is an opportunity to join a dynamic team in Ho Chi Minh City, Vietnam. The engineer will utilize their expertise in DFT to influence design decisions and improve the overall quality of digital products.

Experience Level

The ideal candidate will have a senior level of experience in ASIC digital design, with a strong foundation in DFT practices.

Key Responsibilities

  • Develop and implement DFT architectures in digital ASIC designs.
  • Collaborate with design teams to ensure that DFT techniques are effectively integrated.
  • Conduct test planning and evaluation to maximize test coverage.
  • Optimize design processes for improved testability and reliability.
  • Train and support junior staff on DFT methodologies.

Qualifications

Applicants should possess a deep understanding of digital design principles along with a proven track record in DFT methodologies. Strong analytical and problem-solving skills, as well as the ability to work collaboratively in a team environment, are essential.

Education Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field is required.