Senior ASIC Design Engineer

Job Title

Senior ASIC Design Engineer

Role Summary

Member of the Circuit Solutions Group responsible for micro-architecture and digital RTL implementation of IPs related to hardware security, clocking, voltage regulation, and silicon correlation.

Collaborate with architects, circuit designers, and verification engineers; perform synthesis and timing analysis; support post-silicon bring-up and debugging; and develop automation and tooling, including Agentic AI flows. Role is hybrid based in Santa Clara.

Experience Level

Senior — the posting specifies 3+ years of relevant experience in logic design and RTL implementation.

Responsibilities

Primary technical responsibilities include design, verification support, and post-silicon debug.

• Define micro-architecture and implement digital designs for various IPs (security, clocking, voltage regulation, silicon correlation).
• Develop scalable RTL, run synthesis, and perform static timing analysis using modern CAD tools and advanced process nodes.
• Collaborate with architects, circuit designers, and verification teams to deliver integrated solutions.
• Perform functional verification, CDC checks, and formal equivalence as required.
• Support post-silicon bring-up, debug, and ECO activities.
• Develop automation, tools, and flows to support design work, including Agentic AI-assisted flows where applicable.

Requirements

Must-have technical skills and experience.

• Proven experience in logic design and RTL using Verilog and/or SystemVerilog.
• Solid understanding of physical design and VLSI implementation considerations.
• Experience with multiple clock domains and asynchronous interfaces.
• Exposure to digital systems design and computer architecture concepts.
• Programming/scripting experience in Python or Perl.
• Strong communication and interpersonal skills for cross-functional collaboration.

Nice-to-have / differentiators.

• Experience across all stages of the ASIC flow: front-end design and verification, DFT, timing analysis, ECO, ATE test development, and post-silicon bring-up.
• Familiarity with behavioral real-number modeling and low-level mixed-signal design concepts.
• Experience with custom/mixed-signal IP development.
• Proficiency with scripting and automation tools (Perl, Tcl, Makefiles) and algorithmic automation methods.

Education Requirements

BS in Electrical Engineering, Computer Engineering, or a related field required, or equivalent practical experience. Advanced degrees (MS, PhD) are considered a plus.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.