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Senior Applications Engineer - UCIe

Synopsys
Full-time
On-site
Hsinchu, Taiwan
Level - Senior

Role Summary

This position is for a Senior Applications Engineer focusing on the integration of Universal Chiplet Interconnect Express (UCIe) IP into ASIC SoCs. The role requires deep expertise in semiconductor technology, specifically in ASIC design and verification, engaging with clients to overcome technical challenges.

Experience Level

Applicants should have a minimum of 10 years of experience in ASIC design, verification, or applications engineering, particularly with advanced technology nodes such as 10nm, 7nm, 5nm, or 3nm.

Responsibilities

  • Guide customers in integrating Synopsys UCIe IP into their ASIC SoCs, addressing technical and process challenges.
  • Provide expert advice on IIP configuration, simulation, synthesis, and design-for-test strategies.
  • Conduct integration reviews at significant SoC development milestones.
  • Deliver training and workshops to customer engineering teams on UCIe specifications and integration best practices.
  • Collaborate with R&D to create application notes on advanced integration topics.
  • Assist in pre-sales activities including technical demos and presentations.
  • Provide feedback to R&D for continuous product improvement based on customer insights.
  • Participate in internal design reviews to align product development with market demands.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 10+ years of experience in ASIC design and verification.
  • Hands-on expertise in mixed-signal and high-speed interface design.
  • Strong knowledge of EDA tools and methodologies, with experience in physical verification and signal integrity preferred.
  • Ability to debug and troubleshoot silicon and FPGA/hardware.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.