Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Cisco SystemsJob Title
Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Member of the Mixed-signal IC design group responsible for architecture, design, layout, measurement and productization of ultra-deep-submicron CMOS analog and mixed-signal circuits for high-speed optical transceivers. The role leads large chip blocks, coordinates with digital/DSP, package and system teams, and drives designs from conception to production.
Experience Level
Senior. Typical experience range depends on degree: examples used by the employer are roughly BSEE +12 years, MS +8 years, or PhD +5 years (or equivalent professional experience).
Responsibilities
Primary responsibilities include technical leadership of analog/mixed-signal IC development for optical transceivers and ensuring designs meet system, signal and power integrity requirements.
- Architect, design, layout, characterize and productize ultra-deep-submicron CMOS AMS circuits for optical transceivers.
- Lead design efforts for large blocks on complex SoCs and track deliverables across tapeout cycles.
- Mentor and review work from other IC designers; establish and apply robust design methodology.
- Collaborate with packaging, hardware and system teams to meet signal, power integrity and manufacturability goals.
- Develop high-speed serial link components and high-accuracy analog circuits to meet performance targets.
- Participate in layout floorplanning and ensure designs are ready for manufacturing and ESD/production testing.
Requirements
Must-have technical skills and experience are listed first; preferred skills follow.
- Must-have: Proven design, simulation and measurement experience of high-speed ICs in at least three of the following areas: high-speed serial links (SERDES), data converters, PLLs/clock distribution, output drivers, voltage regulators, opamps/PGAs, and equalization.
- Must-have: Hands-on experience with mixed-signal simulation and layout; familiarity with AMS verification flows.
- Must-have: Practical proficiency with industry tools such as Cadence Virtuoso, Spectre/APS/SpectreX, and MATLAB; familiarity with EM/analysis tools (e.g., EMX) is expected.
- Preferred: Experience with FinFET process technologies and high-frequency layout (passives, transmission lines, transformers, inductors).
- Preferred: Floorplanning for mixed-signal chips, custom transistor layout, designing for manufacturability, and ESD laboratory practices.
- Preferred: Experience with electrical transceiver applications (backplane and cable), and measurement/productization of optical communications ASICs.
Education Requirements
Posted minimums: BSEE with ~12+ years experience, MS with ~8+ years, or PhD with ~5+ years, or equivalent practical experience. (The original posting uses degree-plus-experience equivalencies; equivalent professional experience is acceptable.)
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).
